Add fmt.rs to improve log/debug and embbed and PC
Also add `defmt` to the features list.
This commit is contained in:
René van Dorst
parent
2c36199dea
commit
5c27265a21
@ -21,7 +21,6 @@ embassy-time = { version = "0.1.0" }
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embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
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bitfield = "0.14.0"
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[dev-dependencies]
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# reenable when https://github.com/dbrgn/embedded-hal-mock/pull/86 is merged.
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#embedded-hal-mock = { git = "https://github.com/dbrgn/embedded-hal-mock", branch = "1-alpha", features = ["embedded-hal-async", "eh1"] }] }
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@ -33,9 +32,11 @@ futures-test = "0.3.17"
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[features]
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default = [ ]
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defmt = [ "dep:defmt" ]
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defmt = [ "dep:defmt", "embedded-hal-1/defmt-03" ]
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log = ["dep:log"]
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[package.metadata.embassy_docs]
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src_base = "https://github.com/embassy-rs/embassy/blob/embassy-net-adin1110-v$VERSION/embassy-net-adin1110/src/"
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src_base_git = "https://github.com/embassy-rs/embassy/blob/$COMMIT/embassy-net-adin1110/src/"
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target = "thumbv7em-none-eabi"
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features = ["defmt"]
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254
embassy-net-adin1110/src/fmt.rs
Normal file
254
embassy-net-adin1110/src/fmt.rs
Normal file
@ -0,0 +1,254 @@
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#![macro_use]
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#![allow(unused_macros)]
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use core::fmt::{Debug, Display, LowerHex};
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#[cfg(all(feature = "defmt", feature = "log"))]
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compile_error!("You may not enable both `defmt` and `log` features.");
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macro_rules! assert {
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($($x:tt)*) => {
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{
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#[cfg(not(feature = "defmt"))]
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::core::assert!($($x)*);
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#[cfg(feature = "defmt")]
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::defmt::assert!($($x)*);
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}
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};
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}
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macro_rules! assert_eq {
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($($x:tt)*) => {
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{
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#[cfg(not(feature = "defmt"))]
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::core::assert_eq!($($x)*);
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#[cfg(feature = "defmt")]
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::defmt::assert_eq!($($x)*);
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}
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};
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}
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macro_rules! assert_ne {
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($($x:tt)*) => {
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{
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#[cfg(not(feature = "defmt"))]
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::core::assert_ne!($($x)*);
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#[cfg(feature = "defmt")]
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::defmt::assert_ne!($($x)*);
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}
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};
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}
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macro_rules! debug_assert {
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($($x:tt)*) => {
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{
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#[cfg(not(feature = "defmt"))]
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::core::debug_assert!($($x)*);
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#[cfg(feature = "defmt")]
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::defmt::debug_assert!($($x)*);
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}
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};
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}
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macro_rules! debug_assert_eq {
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($($x:tt)*) => {
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{
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#[cfg(not(feature = "defmt"))]
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::core::debug_assert_eq!($($x)*);
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#[cfg(feature = "defmt")]
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::defmt::debug_assert_eq!($($x)*);
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}
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};
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}
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macro_rules! debug_assert_ne {
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($($x:tt)*) => {
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{
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#[cfg(not(feature = "defmt"))]
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::core::debug_assert_ne!($($x)*);
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#[cfg(feature = "defmt")]
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::defmt::debug_assert_ne!($($x)*);
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}
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};
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}
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macro_rules! todo {
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($($x:tt)*) => {
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{
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#[cfg(not(feature = "defmt"))]
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::core::todo!($($x)*);
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#[cfg(feature = "defmt")]
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::defmt::todo!($($x)*);
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}
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};
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}
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macro_rules! unreachable {
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($($x:tt)*) => {
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{
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#[cfg(not(feature = "defmt"))]
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::core::unreachable!($($x)*);
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#[cfg(feature = "defmt")]
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::defmt::unreachable!($($x)*);
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}
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};
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}
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macro_rules! panic {
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($($x:tt)*) => {
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{
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#[cfg(not(feature = "defmt"))]
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::core::panic!($($x)*);
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#[cfg(feature = "defmt")]
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::defmt::panic!($($x)*);
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}
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};
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}
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macro_rules! trace {
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($s:literal $(, $x:expr)* $(,)?) => {
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{
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#[cfg(feature = "log")]
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::log::trace!($s $(, $x)*);
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#[cfg(feature = "defmt")]
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::defmt::trace!($s $(, $x)*);
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#[cfg(not(any(feature = "log", feature="defmt")))]
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let _ignored = ($( & $x ),*);
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}
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};
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}
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macro_rules! debug {
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($s:literal $(, $x:expr)* $(,)?) => {
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{
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#[cfg(feature = "log")]
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::log::debug!($s $(, $x)*);
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#[cfg(feature = "defmt")]
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::defmt::debug!($s $(, $x)*);
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#[cfg(not(any(feature = "log", feature="defmt")))]
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let _ignored = ($( & $x ),*);
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}
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};
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}
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macro_rules! info {
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($s:literal $(, $x:expr)* $(,)?) => {
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{
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#[cfg(feature = "log")]
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::log::info!($s $(, $x)*);
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#[cfg(feature = "defmt")]
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::defmt::info!($s $(, $x)*);
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#[cfg(not(any(feature = "log", feature="defmt")))]
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let _ignored = ($( & $x ),*);
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}
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};
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}
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macro_rules! warn {
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($s:literal $(, $x:expr)* $(,)?) => {
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{
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#[cfg(feature = "log")]
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::log::warn!($s $(, $x)*);
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#[cfg(feature = "defmt")]
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::defmt::warn!($s $(, $x)*);
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#[cfg(not(any(feature = "log", feature="defmt")))]
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let _ignored = ($( & $x ),*);
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}
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};
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}
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macro_rules! error {
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($s:literal $(, $x:expr)* $(,)?) => {
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{
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#[cfg(feature = "log")]
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::log::error!($s $(, $x)*);
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#[cfg(feature = "defmt")]
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::defmt::error!($s $(, $x)*);
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#[cfg(not(any(feature = "log", feature="defmt")))]
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let _ignored = ($( & $x ),*);
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}
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};
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}
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#[cfg(feature = "defmt")]
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macro_rules! unwrap {
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($($x:tt)*) => {
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::defmt::unwrap!($($x)*)
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};
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}
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#[cfg(not(feature = "defmt"))]
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macro_rules! unwrap {
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($arg:expr) => {
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match $crate::fmt::Try::into_result($arg) {
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::core::result::Result::Ok(t) => t,
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::core::result::Result::Err(e) => {
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::core::panic!("unwrap of `{}` failed: {:?}", ::core::stringify!($arg), e);
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}
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}
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};
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($arg:expr, $($msg:expr),+ $(,)? ) => {
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match $crate::fmt::Try::into_result($arg) {
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::core::result::Result::Ok(t) => t,
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::core::result::Result::Err(e) => {
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::core::panic!("unwrap of `{}` failed: {}: {:?}", ::core::stringify!($arg), ::core::format_args!($($msg,)*), e);
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}
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}
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}
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}
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#[derive(Debug, Copy, Clone, Eq, PartialEq)]
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pub struct NoneError;
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pub trait Try {
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type Ok;
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type Error;
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fn into_result(self) -> Result<Self::Ok, Self::Error>;
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}
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impl<T> Try for Option<T> {
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type Ok = T;
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type Error = NoneError;
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#[inline]
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fn into_result(self) -> Result<T, NoneError> {
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self.ok_or(NoneError)
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}
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}
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impl<T, E> Try for Result<T, E> {
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type Ok = T;
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type Error = E;
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#[inline]
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fn into_result(self) -> Self {
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self
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}
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}
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pub struct Bytes<'a>(pub &'a [u8]);
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impl<'a> Debug for Bytes<'a> {
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fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
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write!(f, "{:#02x?}", self.0)
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}
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}
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impl<'a> Display for Bytes<'a> {
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fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
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write!(f, "{:#02x?}", self.0)
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}
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}
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impl<'a> LowerHex for Bytes<'a> {
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fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
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write!(f, "{:#02x?}", self.0)
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}
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}
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#[cfg(feature = "defmt")]
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impl<'a> defmt::Format for Bytes<'a> {
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fn format(&self, fmt: defmt::Formatter) {
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defmt::write!(fmt, "{:02x}", self.0)
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}
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}
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@ -6,6 +6,9 @@
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#![allow(clippy::missing_panics_doc)]
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#![doc = include_str!("../README.md")]
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// must go first!
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mod fmt;
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mod crc32;
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mod crc8;
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mod mdio;
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@ -20,12 +23,13 @@ use embassy_net_driver_channel as ch;
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use embassy_time::{Duration, Timer};
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use embedded_hal_1::digital::OutputPin;
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use embedded_hal_async::digital::Wait;
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use embedded_hal_async::spi::{Operation, SpiDevice};
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use embedded_hal_async::spi::{Error, Operation, SpiDevice};
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use heapless::Vec;
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pub use mdio::MdioBus;
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pub use phy::{Phy10BaseT1x, RegsC22, RegsC45};
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pub use regs::{Config0, Config2, SpiRegisters as sr, Status0, Status1};
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use crate::fmt::Bytes;
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use crate::regs::{LedCntrl, LedFunc, LedPol, LedPolarity, SpiHeader};
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pub const PHYID: u32 = 0x0283_BC91;
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@ -153,8 +157,7 @@ impl<SPI: SpiDevice> ADIN1110<SPI> {
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let value = u32::from_be_bytes(rx_buf[0..4].try_into().unwrap());
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#[cfg(feature = "defmt")]
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defmt::trace!("REG Read {} = {:08x} SPI {:02x}", reg, value, &tx_buf);
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trace!("REG Read {} = {:08x} SPI {}", reg, value, Bytes(&tx_buf));
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Ok(value)
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}
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@ -181,8 +184,7 @@ impl<SPI: SpiDevice> ADIN1110<SPI> {
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let _ = tx_buf.push(crc8(val.as_slice()));
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}
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#[cfg(feature = "defmt")]
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defmt::trace!("REG Write {} = {:08x} SPI {:02x}", reg, value, &tx_buf);
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trace!("REG Write {} = {:08x} SPI {}", reg, value, Bytes(&tx_buf));
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self.spi.write(&tx_buf).await.map_err(AdinError::Spi)
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}
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@ -219,8 +221,7 @@ impl<SPI: SpiDevice> ADIN1110<SPI> {
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let packet_size = fifo_frame_size - FRAME_HEADER_LEN - FCS_LEN;
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if packet_size > frame.len() {
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#[cfg(feature = "defmt")]
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defmt::trace!("MAX: {} WANT: {}", frame.len(), packet_size);
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trace!("MAX: {} WANT: {}", frame.len(), packet_size);
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return Err(AdinError::PACKET_TOO_BIG);
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}
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@ -333,14 +334,13 @@ impl<SPI: SpiDevice> ADIN1110<SPI> {
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self.write_reg(sr::TX_FSIZE, send_len).await?;
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#[cfg(feature = "defmt")]
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defmt::trace!(
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"TX: hdr {} [{}] {:02x}-{:02x}-{:02x} SIZE: {}",
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trace!(
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"TX: hdr {} [{}] {}-{}-{} SIZE: {}",
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head_data.len(),
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frame.len(),
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head_data.as_slice(),
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frame,
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tail_data.as_slice(),
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Bytes(head_data.as_slice()),
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Bytes(frame),
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Bytes(tail_data.as_slice()),
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send_len,
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);
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@ -445,16 +445,14 @@ impl<'d, SPI: SpiDevice, INT: Wait, RST: OutputPin> Runner<'d, SPI, INT, RST> {
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let (state_chan, mut rx_chan, mut tx_chan) = self.ch.split();
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loop {
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#[cfg(feature = "defmt")]
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defmt::debug!("Waiting for interrupts");
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debug!("Waiting for interrupts");
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match select(self.int.wait_for_low(), tx_chan.tx_buf()).await {
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Either::First(_) => {
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let mut status1_clr = Status1(0);
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let mut status1 = Status1(self.mac.read_reg(sr::STATUS1).await.unwrap());
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while status1.p1_rx_rdy() {
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#[cfg(feature = "defmt")]
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defmt::debug!("alloc RX packet buffer");
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debug!("alloc RX packet buffer");
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match select(rx_chan.rx_buf(), tx_chan.tx_buf()).await {
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// Handle frames that needs to transmit from the wire.
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// Note: rx_chan.rx_buf() channel don´t accept new request
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@ -466,22 +464,18 @@ impl<'d, SPI: SpiDevice, INT: Wait, RST: OutputPin> Runner<'d, SPI, INT, RST> {
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}
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Err(e) => match e {
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AdinError::PACKET_TOO_BIG => {
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#[cfg(feature = "defmt")]
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defmt::error!("RX Packet too big, DROP");
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error!("RX Packet too big, DROP");
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self.mac.write_reg(sr::FIFO_CLR, 1).await.unwrap();
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}
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AdinError::PACKET_TOO_SMALL => {
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#[cfg(feature = "defmt")]
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defmt::error!("RX Packet too small, DROP");
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error!("RX Packet too small, DROP");
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self.mac.write_reg(sr::FIFO_CLR, 1).await.unwrap();
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}
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AdinError::Spi(_) => {
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#[cfg(feature = "defmt")]
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defmt::error!("RX Spi error")
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AdinError::Spi(e) => {
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error!("RX Spi error {}", e.kind());
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}
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_ => {
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#[cfg(feature = "defmt")]
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defmt::error!("RX Error")
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error!("RX Error");
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}
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},
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},
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@ -496,21 +490,18 @@ impl<'d, SPI: SpiDevice, INT: Wait, RST: OutputPin> Runner<'d, SPI, INT, RST> {
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let status0 = Status0(self.mac.read_reg(sr::STATUS0).await.unwrap());
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if status1.0 & !0x1b != 0 {
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#[cfg(feature = "defmt")]
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defmt::error!("SPE CHIP STATUS 0:{:08x} 1:{:08x}", status0.0, status1.0);
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error!("SPE CHIP STATUS 0:{:08x} 1:{:08x}", status0.0, status1.0);
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}
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if status1.tx_rdy() {
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status1_clr.set_tx_rdy(true);
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#[cfg(feature = "defmt")]
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defmt::info!("TX_DONE");
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trace!("TX_DONE");
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}
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if status1.link_change() {
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let link = status1.p1_link_status();
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self.is_link_up = link;
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#[cfg(feature = "defmt")]
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if link {
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let link_status = self
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.mac
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@ -530,9 +521,9 @@ impl<'d, SPI: SpiDevice, INT: Wait, RST: OutputPin> Runner<'d, SPI, INT, RST> {
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.await
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.unwrap();
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defmt::info!("LINK Changed: Link Up, Volt: {} V p-p, MSE: {:0004}", volt, mse);
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info!("LINK Changed: Link Up, Volt: {} V p-p, MSE: {:0004}", volt, mse);
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} else {
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defmt::info!("LINK Changed: Link Down");
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info!("LINK Changed: Link Down");
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}
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state_chan.set_link_state(if link { LinkState::Up } else { LinkState::Down });
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@ -540,50 +531,42 @@ impl<'d, SPI: SpiDevice, INT: Wait, RST: OutputPin> Runner<'d, SPI, INT, RST> {
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}
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if status1.tx_ecc_err() {
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#[cfg(feature = "defmt")]
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defmt::error!("SPI TX_ECC_ERR error, CLEAR TX FIFO");
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error!("SPI TX_ECC_ERR error, CLEAR TX FIFO");
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self.mac.write_reg(sr::FIFO_CLR, 2).await.unwrap();
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status1_clr.set_tx_ecc_err(true);
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}
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if status1.rx_ecc_err() {
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#[cfg(feature = "defmt")]
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defmt::error!("SPI RX_ECC_ERR error");
|
||||
error!("SPI RX_ECC_ERR error");
|
||||
status1_clr.set_rx_ecc_err(true);
|
||||
}
|
||||
|
||||
if status1.spi_err() {
|
||||
#[cfg(feature = "defmt")]
|
||||
defmt::error!("SPI SPI_ERR CRC error");
|
||||
error!("SPI SPI_ERR CRC error");
|
||||
status1_clr.set_spi_err(true);
|
||||
}
|
||||
|
||||
if status0.phyint() {
|
||||
#[cfg_attr(not(feature = "defmt"), allow(unused_variables))]
|
||||
let crsm_irq_st = self
|
||||
.mac
|
||||
.read_cl45(MDIO_PHY_ADDR, RegsC45::DA1E::CRSM_IRQ_STATUS.into())
|
||||
.await
|
||||
.unwrap();
|
||||
|
||||
#[cfg_attr(not(feature = "defmt"), allow(unused_variables))]
|
||||
let phy_irq_st = self
|
||||
.mac
|
||||
.read_cl45(MDIO_PHY_ADDR, RegsC45::DA1F::PHY_SYBSYS_IRQ_STATUS.into())
|
||||
.await
|
||||
.unwrap();
|
||||
|
||||
#[cfg(feature = "defmt")]
|
||||
defmt::warn!(
|
||||
warn!(
|
||||
"SPE CHIP PHY CRSM_IRQ_STATUS {:04x} PHY_SUBSYS_IRQ_STATUS {:04x}",
|
||||
crsm_irq_st,
|
||||
phy_irq_st
|
||||
crsm_irq_st, phy_irq_st
|
||||
);
|
||||
}
|
||||
|
||||
if status0.txfcse() {
|
||||
#[cfg(feature = "defmt")]
|
||||
defmt::error!("SPE CHIP PHY TX Frame CRC error");
|
||||
error!("Ethernet Frame FCS and calc FCS don't match!");
|
||||
}
|
||||
|
||||
// Clear status0
|
||||
@ -613,8 +596,7 @@ pub async fn new<const N_RX: usize, const N_TX: usize, SPI: SpiDevice, INT: Wait
|
||||
) -> (Device<'_>, Runner<'_, SPI, INT, RST>) {
|
||||
use crate::regs::{IMask0, IMask1};
|
||||
|
||||
#[cfg(feature = "defmt")]
|
||||
defmt::info!("INIT ADIN1110");
|
||||
info!("INIT ADIN1110");
|
||||
|
||||
// Reset sequence
|
||||
reset.set_low().unwrap();
|
||||
@ -634,23 +616,20 @@ pub async fn new<const N_RX: usize, const N_TX: usize, SPI: SpiDevice, INT: Wait
|
||||
let id = mac.read_reg(sr::PHYID).await.unwrap();
|
||||
assert_eq!(id, PHYID);
|
||||
|
||||
#[cfg(feature = "defmt")]
|
||||
defmt::debug!("SPE: CHIP MAC/ID: {:08x}", id);
|
||||
debug!("SPE: CHIP MAC/ID: {:08x}", id);
|
||||
|
||||
#[cfg(feature = "defmt")]
|
||||
#[cfg(any(feature = "defmt", feature = "log"))]
|
||||
{
|
||||
let adin_phy = Phy10BaseT1x::default();
|
||||
#[cfg(feature = "defmt")]
|
||||
let phy_id = adin_phy.get_id(&mut mac).await.unwrap();
|
||||
#[cfg(feature = "defmt")]
|
||||
defmt::debug!("SPE: CHIP: PHY ID: {:08x}", phy_id);
|
||||
debug!("SPE: CHIP: PHY ID: {:08x}", phy_id);
|
||||
}
|
||||
|
||||
let mi_control = mac.read_cl22(MDIO_PHY_ADDR, RegsC22::CONTROL as u8).await.unwrap();
|
||||
#[cfg(feature = "defmt")]
|
||||
defmt::println!("SPE CHIP PHY MI_CONTROL {:04x}", mi_control);
|
||||
debug!("SPE CHIP PHY MI_CONTROL {:04x}", mi_control);
|
||||
if mi_control & 0x0800 != 0 {
|
||||
let val = mi_control & !0x0800;
|
||||
#[cfg(feature = "defmt")]
|
||||
defmt::println!("SPE CHIP PHY MI_CONTROL Disable PowerDown");
|
||||
debug!("SPE CHIP PHY MI_CONTROL Disable PowerDown");
|
||||
mac.write_cl22(MDIO_PHY_ADDR, RegsC22::CONTROL as u8, val)
|
||||
.await
|
||||
.unwrap();
|
||||
|
||||
@ -1,3 +1,5 @@
|
||||
use core::fmt::{Debug, Display};
|
||||
|
||||
use bitfield::{bitfield, bitfield_bitrange, bitfield_fields};
|
||||
|
||||
#[allow(non_camel_case_types)]
|
||||
@ -34,6 +36,12 @@ pub enum SpiRegisters {
|
||||
RX = 0x91,
|
||||
}
|
||||
|
||||
impl Display for SpiRegisters {
|
||||
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
|
||||
write!(f, "{self:?}")
|
||||
}
|
||||
}
|
||||
|
||||
impl From<SpiRegisters> for u16 {
|
||||
fn from(val: SpiRegisters) -> Self {
|
||||
val as u16
|
||||
@ -68,7 +76,7 @@ impl From<u16> for SpiRegisters {
|
||||
0x73 => Self::ADDR_MSK_UPR1,
|
||||
0x90 => Self::RX_FSIZE,
|
||||
0x91 => Self::RX,
|
||||
e => panic!("Unknown value {e}"),
|
||||
e => panic!("Unknown value {}", e),
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -313,7 +321,7 @@ impl From<u8> for LedFunc {
|
||||
26 => LedFunc::Clk25Ref,
|
||||
27 => LedFunc::TxTCLK,
|
||||
28 => LedFunc::Clk120MHz,
|
||||
e => panic!("Invalid value {e}"),
|
||||
e => panic!("Invalid value {}", e),
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -369,7 +377,7 @@ impl From<u8> for LedPol {
|
||||
0 => LedPol::AutoSense,
|
||||
1 => LedPol::ActiveHigh,
|
||||
2 => LedPol::ActiveLow,
|
||||
e => panic!("Invalid value {e}"),
|
||||
e => panic!("Invalid value {}", e),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user