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Added a new rm2 feature flag

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This commit is contained in:
Bailey Townsend 2024-12-27 12:29:17 -06:00
parent b71696c8f5
commit 56f9296581
2 changed files with 9 additions and 1 deletions
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2
cyw43-pio/Cargo.toml
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@ -13,6 +13,8 @@ documentation = "https://docs.embassy.dev/cyw43-pio"
# If disabled, SPI runs at 31.25MHz # If disabled, SPI runs at 31.25MHz
# If enabled, SPI runs at 62.5MHz, which is 25% higher than 50Mhz which is the maximum according to the CYW43439 datasheet. # If enabled, SPI runs at 62.5MHz, which is 25% higher than 50Mhz which is the maximum according to the CYW43439 datasheet.
overclock = [] overclock = []
# If enabled the PIO runs at a speed that works with the rm2 module
rm2 = []
[dependencies] [dependencies]
cyw43 = { version = "0.2.0", path = "../cyw43" } cyw43 = { version = "0.2.0", path = "../cyw43" }

8
cyw43-pio/src/lib.rs
View File

@ -120,7 +120,7 @@ where
cfg.clock_divider = FixedU32::from_bits(0x0100); cfg.clock_divider = FixedU32::from_bits(0x0100);
} }
#[cfg(not(feature = "overclock"))] #[cfg(not(any(feature = "overclock", feature = "rm2")))]
{ {
// same speed as pico-sdk, 62.5Mhz // same speed as pico-sdk, 62.5Mhz
// This is actually the fastest we can go without overclocking. // This is actually the fastest we can go without overclocking.
@ -132,6 +132,12 @@ where
cfg.clock_divider = FixedU32::from_bits(0x0200); cfg.clock_divider = FixedU32::from_bits(0x0200);
} }
#[cfg(feature = "rm2")]
{
// This is found to work better with the RM2 module which is found on the Pimoroni Pico Plus 2 W
cfg.clock_divider = FixedU32::from_bits(0x0300);
}
sm.set_config(&cfg); sm.set_config(&cfg);
sm.set_pin_dirs(Direction::Out, &[&pin_clk, &pin_io]); sm.set_pin_dirs(Direction::Out, &[&pin_clk, &pin_io]);