Merge #921
921: rp: fix nvic prio bits (it's 2, not 3) r=Dirbaio a=Dirbaio bors r+ Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
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				@ -30,7 +30,7 @@ unstable-traits = ["embedded-hal-1"]
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embassy-util = { version = "0.1.0", path = "../embassy-util" }
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					embassy-util = { version = "0.1.0", path = "../embassy-util" }
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embassy-executor = { version = "0.1.0", path = "../embassy-executor" }
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					embassy-executor = { version = "0.1.0", path = "../embassy-executor" }
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embassy-time = { version = "0.1.0", path = "../embassy-time", features = [ "tick-1mhz" ] }
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					embassy-time = { version = "0.1.0", path = "../embassy-time", features = [ "tick-1mhz" ] }
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embassy-cortex-m = { version = "0.1.0", path = "../embassy-cortex-m", features = ["prio-bits-3"]}
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					embassy-cortex-m = { version = "0.1.0", path = "../embassy-cortex-m", features = ["prio-bits-2"]}
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embassy-hal-common = {version = "0.1.0", path = "../embassy-hal-common" }
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					embassy-hal-common = {version = "0.1.0", path = "../embassy-hal-common" }
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embassy-embedded-hal = {version = "0.1.0", path = "../embassy-embedded-hal" }
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					embassy-embedded-hal = {version = "0.1.0", path = "../embassy-embedded-hal" }
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atomic-polyfill = "1.0.1"
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					atomic-polyfill = "1.0.1"
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@ -189,7 +189,7 @@ impl<'d, T: Pin> InputFuture<'d, T> {
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        unsafe {
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					        unsafe {
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            let irq = interrupt::IO_IRQ_BANK0::steal();
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					            let irq = interrupt::IO_IRQ_BANK0::steal();
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            irq.disable();
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					            irq.disable();
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            irq.set_priority(interrupt::Priority::P6);
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					            irq.set_priority(interrupt::Priority::P3);
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            // Each INTR register is divided into 8 groups, one group for each
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					            // Each INTR register is divided into 8 groups, one group for each
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            // pin, and each group consists of LEVEL_LOW, LEVEL_HIGH, EDGE_LOW,
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					            // pin, and each group consists of LEVEL_LOW, LEVEL_HIGH, EDGE_LOW,
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