refactor: update DMA transfer functions to support separate memory and peripheral word types

This commit is contained in:
Liu Hancheng 2025-01-04 22:10:47 +08:00
parent 03dd50316c
commit 50e98a9a58
2 changed files with 21 additions and 15 deletions

View File

@ -143,27 +143,28 @@ impl<'a> Transfer<'a> {
buf.len(), buf.len(),
true, true,
W::size(), W::size(),
W::size(),
options, options,
) )
} }
/// Create a new write DMA transfer (memory to peripheral). /// Create a new write DMA transfer (memory to peripheral).
pub unsafe fn new_write<W: Word>( pub unsafe fn new_write<MW: Word, PW: Word>(
channel: impl Peripheral<P = impl Channel> + 'a, channel: impl Peripheral<P = impl Channel> + 'a,
request: Request, request: Request,
buf: &'a [W], buf: &'a [MW],
peri_addr: *mut W, peri_addr: *mut PW,
options: TransferOptions, options: TransferOptions,
) -> Self { ) -> Self {
Self::new_write_raw(channel, request, buf, peri_addr, options) Self::new_write_raw(channel, request, buf, peri_addr, options)
} }
/// Create a new write DMA transfer (memory to peripheral), using raw pointers. /// Create a new write DMA transfer (memory to peripheral), using raw pointers.
pub unsafe fn new_write_raw<W: Word>( pub unsafe fn new_write_raw<MW: Word, PW: Word>(
channel: impl Peripheral<P = impl Channel> + 'a, channel: impl Peripheral<P = impl Channel> + 'a,
request: Request, request: Request,
buf: *const [W], buf: *const [MW],
peri_addr: *mut W, peri_addr: *mut PW,
options: TransferOptions, options: TransferOptions,
) -> Self { ) -> Self {
into_ref!(channel); into_ref!(channel);
@ -173,21 +174,22 @@ impl<'a> Transfer<'a> {
request, request,
Dir::MemoryToPeripheral, Dir::MemoryToPeripheral,
peri_addr as *const u32, peri_addr as *const u32,
buf as *const W as *mut u32, buf as *const MW as *mut u32,
buf.len(), buf.len(),
true, true,
W::size(), MW::size(),
PW::size(),
options, options,
) )
} }
/// Create a new write DMA transfer (memory to peripheral), writing the same value repeatedly. /// Create a new write DMA transfer (memory to peripheral), writing the same value repeatedly.
pub unsafe fn new_write_repeated<W: Word>( pub unsafe fn new_write_repeated<MW: Word, PW: Word>(
channel: impl Peripheral<P = impl Channel> + 'a, channel: impl Peripheral<P = impl Channel> + 'a,
request: Request, request: Request,
repeated: &'a W, repeated: &'a MW,
count: usize, count: usize,
peri_addr: *mut W, peri_addr: *mut PW,
options: TransferOptions, options: TransferOptions,
) -> Self { ) -> Self {
into_ref!(channel); into_ref!(channel);
@ -197,10 +199,11 @@ impl<'a> Transfer<'a> {
request, request,
Dir::MemoryToPeripheral, Dir::MemoryToPeripheral,
peri_addr as *const u32, peri_addr as *const u32,
repeated as *const W as *mut u32, repeated as *const MW as *mut u32,
count, count,
false, false,
W::size(), MW::size(),
PW::size(),
options, options,
) )
} }
@ -214,6 +217,7 @@ impl<'a> Transfer<'a> {
mem_len: usize, mem_len: usize,
incr_mem: bool, incr_mem: bool,
data_size: WordSize, data_size: WordSize,
dst_size: WordSize,
_options: TransferOptions, _options: TransferOptions,
) -> Self { ) -> Self {
// BNDT is specified as bytes, not as number of transfers. // BNDT is specified as bytes, not as number of transfers.
@ -234,7 +238,7 @@ impl<'a> Transfer<'a> {
ch.llr().write(|_| {}); // no linked list ch.llr().write(|_| {}); // no linked list
ch.tr1().write(|w| { ch.tr1().write(|w| {
w.set_sdw(data_size.into()); w.set_sdw(data_size.into());
w.set_ddw(data_size.into()); w.set_ddw(dst_size.into());
w.set_sinc(dir == Dir::MemoryToPeripheral && incr_mem); w.set_sinc(dir == Dir::MemoryToPeripheral && incr_mem);
w.set_dinc(dir == Dir::PeripheralToMemory && incr_mem); w.set_dinc(dir == Dir::PeripheralToMemory && incr_mem);
}); });

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@ -416,8 +416,10 @@ macro_rules! impl_waveform_chx {
} }
#[cfg(not(any(stm32l0)))] #[cfg(not(any(stm32l0)))]
TimerBits::Bits32 => { TimerBits::Bits32 => {
#[cfg(not(any(bdma, gpdma)))]
panic!("unsupported timer bits");
#[cfg(any(bdma, gpdma))] #[cfg(any(bdma, gpdma))]
panic("unsupported timer bits");
Transfer::new_write( Transfer::new_write(
&mut dma, &mut dma,
req, req,