From 41c8bf867bc185507e1b9eadbf5645e57004cd4f Mon Sep 17 00:00:00 2001 From: klownfish Date: Tue, 31 Dec 2024 01:04:18 +0100 Subject: [PATCH] fix formatting --- embassy-stm32/src/adc/mod.rs | 2 +- embassy-stm32/src/adc/u5_adc4.rs | 35 +++++++++++++------------------- embassy-stm32/src/adc/v4.rs | 10 +++------ examples/stm32u5/src/bin/adc.rs | 30 +++++++++++---------------- 4 files changed, 30 insertions(+), 47 deletions(-) diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index 3cf2ca72e..36898b8f9 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs @@ -259,4 +259,4 @@ pub const fn resolution_to_max_count(res: Resolution) -> u32 { #[allow(unreachable_patterns)] _ => core::unreachable!(), } -} \ No newline at end of file +} diff --git a/embassy-stm32/src/adc/u5_adc4.rs b/embassy-stm32/src/adc/u5_adc4.rs index 468d16640..0635dad9b 100644 --- a/embassy-stm32/src/adc/u5_adc4.rs +++ b/embassy-stm32/src/adc/u5_adc4.rs @@ -1,17 +1,12 @@ -pub use crate::pac::adc::vals::Adc4Res as Resolution; -pub use crate::pac::adc::vals::Adc4SampleTime as SampleTime; -pub use crate::pac::adc::vals::Adc4Presc as Presc; -pub use crate::pac::adc::regs::Adc4Chselrmod0; - #[allow(unused)] -use pac::adc::vals::{Adc4Exten, Adc4OversamplingRatio, Adc4Dmacfg}; +use pac::adc::vals::{Adc4Dmacfg, Adc4Exten, Adc4OversamplingRatio}; -use super::{ - blocking_delay_us, AdcChannel, SealedAdcChannel, AnyAdcChannel, RxDma4 -}; +use super::{blocking_delay_us, AdcChannel, AnyAdcChannel, RxDma4, SealedAdcChannel}; +use crate::dma::Transfer; +pub use crate::pac::adc::regs::Adc4Chselrmod0; +pub use crate::pac::adc::vals::{Adc4Presc as Presc, Adc4Res as Resolution, Adc4SampleTime as SampleTime}; use crate::time::Hertz; use crate::{pac, rcc, Peripheral}; -use crate::dma::Transfer; const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(55); @@ -74,7 +69,7 @@ impl SealedAdcChannel for Vcore { pub enum DacChannel { OUT1, - OUT2 + OUT2, } /// Number of samples used for averaging. @@ -186,7 +181,7 @@ pub struct Adc4<'d, T: Instance> { #[derive(Debug)] pub enum Adc4Error { InvalidSequence, - DMAError + DMAError, } impl<'d, T: Instance> Adc4<'d, T> { @@ -205,9 +200,7 @@ impl<'d, T: Instance> Adc4<'d, T> { panic!("Maximal allowed frequency for ADC4 is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 / 1_000_000 ); } - let mut s = Self { - adc, - }; + let mut s = Self { adc }; s.power_up(); @@ -227,7 +220,7 @@ impl<'d, T: Instance> Adc4<'d, T> { T::regs().cr().modify(|w| { w.set_advregen(true); }); - while !T::regs().isr().read().ldordy() { }; + while !T::regs().isr().read().ldordy() {} T::regs().isr().modify(|w| { w.set_ldordy(true); @@ -300,8 +293,8 @@ impl<'d, T: Instance> Adc4<'d, T> { pub fn enable_dac_channel(&self, dac: DacChannel) -> Dac { let mux; match dac { - DacChannel::OUT1 => {mux = false}, - DacChannel::OUT2 => {mux = true} + DacChannel::OUT1 => mux = false, + DacChannel::OUT2 => mux = true, } T::regs().or().modify(|w| w.set_chn21sel(mux)); Dac {} @@ -346,7 +339,7 @@ impl<'d, T: Instance> Adc4<'d, T> { } /// Read an ADC channel. - pub fn blocking_read(&mut self, channel: &mut impl AdcChannel) -> u16{ + pub fn blocking_read(&mut self, channel: &mut impl AdcChannel) -> u16 { channel.setup(); // Select channel @@ -440,7 +433,7 @@ impl<'d, T: Instance> Adc4<'d, T> { T::regs().chselrmod0().modify(|w| { w.set_chsel(channel.channel as usize, true); }); - }; + } let request = rx_dma.request(); let transfer = unsafe { @@ -483,4 +476,4 @@ impl<'d, T: Instance> Adc4<'d, T> { while T::regs().cr().read().adstart() {} } } -} \ No newline at end of file +} diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index 96dae25bd..46f9c7ac7 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs @@ -1,9 +1,7 @@ -#[allow(unused)] -use pac::adc::vals::{Adstp, Difsel, Exten, Pcsel, Dmngt}; - #[cfg(not(stm32u5))] -use pac::adc::vals::{Adcaldif, Boost}; - +use pac::adc::vals::{Adcaldif, Boost}; +#[allow(unused)] +use pac::adc::vals::{Adstp, Difsel, Dmngt, Exten, Pcsel}; use pac::adccommon::vals::Presc; use super::{ @@ -26,7 +24,6 @@ const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(50); #[cfg(stm32u5)] const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(55); - #[cfg(stm32g4)] const VREF_CHANNEL: u8 = 18; #[cfg(stm32g4)] @@ -41,7 +38,6 @@ const TEMP_CHANNEL: u8 = 18; #[cfg(not(stm32u5))] const VBAT_CHANNEL: u8 = 17; - #[cfg(stm32u5)] const VREF_CHANNEL: u8 = 0; #[cfg(stm32u5)] diff --git a/examples/stm32u5/src/bin/adc.rs b/examples/stm32u5/src/bin/adc.rs index 05e3faeb1..6ba21cc63 100644 --- a/examples/stm32u5/src/bin/adc.rs +++ b/examples/stm32u5/src/bin/adc.rs @@ -1,19 +1,14 @@ #![no_std] #![no_main] - -use defmt::{*}; -use defmt_rtt as _; - +use defmt::*; use embassy_stm32::adc; -use embassy_stm32::adc::AdcChannel; -use embassy_stm32::adc::adc4; -use panic_probe as _; - +use embassy_stm32::adc::{adc4, AdcChannel}; +use {defmt_rtt as _, panic_probe as _}; #[embassy_executor::main] -async fn main(spawner: embassy_executor::Spawner) { - let mut config = embassy_stm32::Config::default(); +async fn main(_spawner: embassy_executor::Spawner) { + let config = embassy_stm32::Config::default(); let mut p = embassy_stm32::init(config); @@ -84,7 +79,8 @@ async fn main(spawner: embassy_executor::Spawner) { ] .into_iter(), &mut measurements, - ).await; + ) + .await; let volt1: f32 = 3.3 * measurements[0] as f32 / max1 as f32; let volt2: f32 = 3.3 * measurements[1] as f32 / max1 as f32; @@ -101,15 +97,13 @@ async fn main(spawner: embassy_executor::Spawner) { // The channels must be in ascending order and can't repeat for ADC4 adc4.read( &mut p.GPDMA1_CH1, - [ - &mut degraded42, - &mut degraded41, - ] - .into_iter(), + [&mut degraded42, &mut degraded41].into_iter(), &mut measurements, - ).await.unwrap(); + ) + .await + .unwrap(); let volt2: f32 = 3.3 * measurements[0] as f32 / max4 as f32; let volt1: f32 = 3.3 * measurements[1] as f32 / max4 as f32; info!("Async read 4 pin 1 {}", volt1); info!("Async read 4 pin 2 {}", volt2); -} \ No newline at end of file +}