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Search can use the normal write/read instructions

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Marc 2025-04-25 00:40:32 +02:00
parent 29bcddaa10
commit 2a4b380cb7
1 changed files with 62 additions and 67 deletions
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129
embassy-rp/src/pio_programs/onewire.rs
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@ -12,7 +12,6 @@ pub struct PioOneWireProgram<'a, PIO: Instance> {
prg: LoadedProgram<'a, PIO>, prg: LoadedProgram<'a, PIO>,
reset_addr: u8, reset_addr: u8,
next_bit_addr: u8, next_bit_addr: u8,
search_addr: u8,
} }
impl<'a, PIO: Instance> PioOneWireProgram<'a, PIO> { impl<'a, PIO: Instance> PioOneWireProgram<'a, PIO> {
@ -53,35 +52,17 @@ impl<'a, PIO: Instance> PioOneWireProgram<'a, PIO> {
; The low pulse was already done, we only need to delay and poll the bit in case we are reading ; The low pulse was already done, we only need to delay and poll the bit in case we are reading
write_1: write_1:
nop side 0 [( 6 / CLK) - 1] ; Delay before sampling the input pin nop side 0 [( 6 / CLK) - 1] ; Delay before sampling the input pin
in pins, 1 side 0 [(54 / CLK) - 1] ; This writes the state of the pin into the ISR in pins, 1 side 0 [(48 / CLK) - 1] ; This writes the state of the pin into the ISR
; Fallthrough ; Fallthrough
; This is the entry point when reading and writing data ; This is the entry point when reading and writing data
public next_bit: public next_bit:
.wrap_target .wrap_target
out x, 1 side 0 [(18 / CLK) - 1] ; Stalls if no data available in TX FIFO and OSR out x, 1 side 0 [(12 / CLK) - 1] ; Stalls if no data available in TX FIFO and OSR
jmp x--, write_1 side 1 [(12 / CLK) - 1] ; Do the always low part of a bit, jump to write_1 if we want to write a 1 bit jmp x--, write_1 side 1 [( 6 / CLK) - 1] ; Do the always low part of a bit, jump to write_1 if we want to write a 1 bit
in null, 1 side 1 [(60 / CLK) - 1] ; Do the remainder of the low part of a 0 bit in null, 1 side 1 [(54 / CLK) - 1] ; Do the remainder of the low part of a 0 bit
; This writes 0 into the ISR so that the shift count stays in sync ; This writes 0 into the ISR so that the shift count stays in sync
.wrap .wrap
public search:
set x, 1 side 0 [(78 / CLK) - 1] ; Set x to 1 for the inner loop
search_inner:
; Read 2 bits
nop side 1 [(12 / CLK) - 1] ; Do the always low part of a bit
nop side 0 [( 6 / CLK) - 1] ; Delay before sampling the input pin
in pins, 1 side 0 [(54 / CLK) - 1] ; This writes the state of the pin into the ISR
jmp x--, search_inner side 0 [(18 / CLK) - 1]
; Fallthrough
; Write output
out x, 1 side 0 [( 6 / CLK) - 1] ; Stalls if no data available in TX FIFO and OSR
jmp x--, search side 1 [(12 / CLK) - 1] ; Do the always low part of a bit, jump to search to write a 1 bit
; Fallthrough
set x, 1 side 1 [(60 / CLK) - 1] ; Set x to 1 for the inner loop, write the remainder of the low part of a 0 bit
jmp search_inner side 0 [(18 / CLK) - 1]
"# "#
); );
@ -89,7 +70,6 @@ impl<'a, PIO: Instance> PioOneWireProgram<'a, PIO> {
prg: common.load_program(&prg.program), prg: common.load_program(&prg.program),
reset_addr: prg.public_defines.reset as u8, reset_addr: prg.public_defines.reset as u8,
next_bit_addr: prg.public_defines.next_bit as u8, next_bit_addr: prg.public_defines.next_bit as u8,
search_addr: prg.public_defines.search as u8,
} }
} }
} }
@ -98,7 +78,6 @@ pub struct PioOneWire<'d, PIO: Instance, const SM: usize> {
sm: StateMachine<'d, PIO, SM>, sm: StateMachine<'d, PIO, SM>,
cfg: Config<'d, PIO>, cfg: Config<'d, PIO>,
reset_addr: u8, reset_addr: u8,
search_addr: u8,
next_bit_addr: u8, next_bit_addr: u8,
} }
@ -119,13 +98,16 @@ impl<'d, PIO: Instance, const SM: usize> PioOneWire<'d, PIO, SM> {
cfg.use_program(&program.prg, &[&pin]); cfg.use_program(&program.prg, &[&pin]);
cfg.set_in_pins(&[&pin]); cfg.set_in_pins(&[&pin]);
let byte_shift = ShiftConfig { cfg.shift_in = ShiftConfig {
auto_fill: true,
direction: ShiftDirection::Right,
threshold: 8,
};
cfg.shift_out = ShiftConfig {
auto_fill: true, auto_fill: true,
direction: ShiftDirection::Right, direction: ShiftDirection::Right,
threshold: 8, threshold: 8,
}; };
cfg.shift_in = byte_shift;
cfg.shift_out = byte_shift;
let divider = (clk_sys_freq() / 1000000) as u16 * 6; let divider = (clk_sys_freq() / 1000000) as u16 * 6;
cfg.clock_divider = divider.into(); cfg.clock_divider = divider.into();
@ -142,11 +124,11 @@ impl<'d, PIO: Instance, const SM: usize> PioOneWire<'d, PIO, SM> {
sm, sm,
cfg, cfg,
reset_addr: program.reset_addr, reset_addr: program.reset_addr,
search_addr: program.search_addr,
next_bit_addr: program.next_bit_addr, next_bit_addr: program.next_bit_addr,
} }
} }
/// Perform an initialization sequence, will return true if a presence pulse was detected from a device
pub async fn reset(&mut self) -> bool { pub async fn reset(&mut self) -> bool {
// The state machine immediately starts running when jumping to this address // The state machine immediately starts running when jumping to this address
unsafe { unsafe {
@ -164,18 +146,18 @@ impl<'d, PIO: Instance, const SM: usize> PioOneWire<'d, PIO, SM> {
found found
} }
/// Write bytes over the wire /// Write bytes to the onewire bus
pub async fn write_bytes(&mut self, data: &[u8]) { pub async fn write_bytes(&mut self, data: &[u8]) {
let (rx, tx) = self.sm.rx_tx(); let (rx, tx) = self.sm.rx_tx();
for b in data { for b in data {
tx.wait_push(*b as u32).await; tx.wait_push(*b as u32).await;
// Empty the buffer that is always filled // Empty the buffer that is being filled with every write
let _ = rx.wait_pull().await; let _ = rx.wait_pull().await;
} }
} }
/// Read bytes from the wire /// Read bytes from the onewire bus
pub async fn read_bytes(&mut self, data: &mut [u8]) { pub async fn read_bytes(&mut self, data: &mut [u8]) {
let (rx, tx) = self.sm.rx_tx(); let (rx, tx) = self.sm.rx_tx();
for b in data { for b in data {
@ -187,19 +169,29 @@ impl<'d, PIO: Instance, const SM: usize> PioOneWire<'d, PIO, SM> {
} }
async fn search(&mut self, state: &mut PioOneWireSearch) -> Option<u64> { async fn search(&mut self, state: &mut PioOneWireSearch) -> Option<u64> {
let _ = self.reset().await; if !self.reset().await {
self.write_bytes(&[0xF0]).await; // No device present, no use in searching
state.finished = true;
return None;
}
self.write_bytes(&[0xF0]).await; // 0xF0 is the search rom command
let shift_cfg = self.prepare_search(); self.prepare_search();
let (rx, tx) = self.sm.rx_tx(); let (rx, tx) = self.sm.rx_tx();
let mut value = 0u64; let mut value = 0;
let mut last_zero = 0; let mut last_zero = 0;
for bit in 0..64 { for bit in 0..64 {
let push = match rx.wait_pull().await { // Write 2 dummy bits to read a bit and its complement
0b00 => { tx.wait_push(0x1).await;
tx.wait_push(0x1).await;
let in1 = rx.wait_pull().await;
let in2 = rx.wait_pull().await;
let push = match (in1, in2) {
(0, 0) => {
// If both are 0, it means we have devices with 0 and 1 bits in this position
let write_value = if bit < state.last_discrepancy { let write_value = if bit < state.last_discrepancy {
(state.last_rom & (1 << bit)) != 0 (state.last_rom & (1 << bit)) != 0
} else { } else {
@ -213,10 +205,11 @@ impl<'d, PIO: Instance, const SM: usize> PioOneWire<'d, PIO, SM> {
0 0
} }
} }
0b01 => 0, (0, 1) => 0, // Only devices with a 0 bit in this position
0b10 => 1, (1, 0) => 1, // Only devices with a 1 bit in this position
_ => { _ => {
self.restore_after_search(&shift_cfg); // If both are 1, it means there is no device active and there is no point in continuing
self.restore_after_search();
state.finished = true; state.finished = true;
return None; return None;
} }
@ -226,9 +219,10 @@ impl<'d, PIO: Instance, const SM: usize> PioOneWire<'d, PIO, SM> {
value |= 1 << 63; value |= 1 << 63;
} }
tx.wait_push(push).await; tx.wait_push(push).await;
let _ = rx.wait_pull().await; // Discard the result of the write action
} }
self.restore_after_search(&shift_cfg); self.restore_after_search();
state.last_discrepancy = last_zero; state.last_discrepancy = last_zero;
state.finished = last_zero == 0; state.finished = last_zero == 0;
@ -236,44 +230,42 @@ impl<'d, PIO: Instance, const SM: usize> PioOneWire<'d, PIO, SM> {
Some(value) Some(value)
} }
fn prepare_search(&mut self) -> ShiftConfig { fn prepare_search(&mut self) {
let shift_cfg = self.cfg.shift_in; self.cfg.shift_in.threshold = 1;
self.cfg.shift_in = ShiftConfig { self.cfg.shift_in.direction = ShiftDirection::Left;
auto_fill: true, self.cfg.shift_out.threshold = 1;
direction: ShiftDirection::Left,
threshold: 2,
};
self.cfg.shift_out = ShiftConfig {
auto_fill: true,
direction: ShiftDirection::Right,
threshold: 1,
};
self.sm.set_enable(false); self.sm.set_enable(false);
self.sm.set_config(&self.cfg); self.sm.set_config(&self.cfg);
unsafe { // set_config jumps to the wrong address so jump to the right one here
self.sm.exec_jmp(self.search_addr);
}
self.sm.set_enable(true);
shift_cfg
}
fn restore_after_search(&mut self, cfg: &ShiftConfig) {
self.cfg.shift_in = *cfg;
self.cfg.shift_out = *cfg;
self.sm.set_enable(false);
self.sm.set_config(&self.cfg);
unsafe { unsafe {
self.sm.exec_jmp(self.next_bit_addr); self.sm.exec_jmp(self.next_bit_addr);
} }
self.sm.set_enable(true);
}
fn restore_after_search(&mut self) {
self.cfg.shift_in.threshold = 8;
self.cfg.shift_in.direction = ShiftDirection::Right;
self.cfg.shift_out.threshold = 8;
self.sm.set_enable(false);
self.sm.set_config(&self.cfg);
// Clear the state in case we aborted prematurely with some bits still in the shift registers
self.sm.clear_fifos(); self.sm.clear_fifos();
self.sm.restart(); self.sm.restart();
// set_config jumps to the wrong address so jump to the right one here
unsafe {
self.sm.exec_jmp(self.next_bit_addr);
}
self.sm.set_enable(true); self.sm.set_enable(true);
} }
} }
/// Onewire search state
pub struct PioOneWireSearch { pub struct PioOneWireSearch {
last_rom: u64, last_rom: u64,
last_discrepancy: u8, last_discrepancy: u8,
@ -281,6 +273,7 @@ pub struct PioOneWireSearch {
} }
impl PioOneWireSearch { impl PioOneWireSearch {
/// Create a new Onewire search state
pub fn new() -> Self { pub fn new() -> Self {
Self { Self {
last_rom: 0, last_rom: 0,
@ -289,6 +282,7 @@ impl PioOneWireSearch {
} }
} }
/// Search for the next address on the bus
pub async fn next<PIO: Instance, const SM: usize>(&mut self, pio: &mut PioOneWire<'_, PIO, SM>) -> Option<u64> { pub async fn next<PIO: Instance, const SM: usize>(&mut self, pio: &mut PioOneWire<'_, PIO, SM>) -> Option<u64> {
if self.finished { if self.finished {
None None
@ -297,6 +291,7 @@ impl PioOneWireSearch {
} }
} }
/// Is finished when all devices have been found
pub fn is_finished(&self) -> bool { pub fn is_finished(&self) -> bool {
self.finished self.finished
} }