From 152d8ee0d9526a9b5d41350385ee2b2102c0c43f Mon Sep 17 00:00:00 2001 From: elagil Date: Thu, 28 Nov 2024 17:36:14 +0100 Subject: [PATCH] fix: make `write_immediate()` for ring buffers right-aligned --- embassy-stm32/src/dma/ringbuffer/mod.rs | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/src/dma/ringbuffer/mod.rs b/embassy-stm32/src/dma/ringbuffer/mod.rs index 25bdc7522..4dc1b51a9 100644 --- a/embassy-stm32/src/dma/ringbuffer/mod.rs +++ b/embassy-stm32/src/dma/ringbuffer/mod.rs @@ -252,9 +252,13 @@ impl<'a, W: Word> WritableDmaRingBuffer<'a, W> { } /// Write elements directly to the buffer. + /// + /// Data is aligned towards the end of the buffer. pub fn write_immediate(&mut self, buf: &[W]) -> Result<(usize, usize), Error> { + let start = self.cap() - buf.len(); + for (i, data) in buf.iter().enumerate() { - self.write_buf(i, *data) + self.write_buf(start + i, *data) } let written = buf.len().min(self.cap()); Ok((written, self.cap() - written))