LailaTheElf/embassy
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Changes after review: copypasted doc comment fixed and no cfg gates to panic on failing pll config in init()

Browse Source
This commit is contained in:
1-rafael-1 2025-05-13 10:49:23 +02:00
parent abafbed0d5
commit 1314808b3a
1 changed files with 3 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
embassy-rp/src/clocks.rs
View File

@ -152,11 +152,6 @@ pub enum PeriClkSrc {
/// ///
/// The voltage regulator can be configured for different output voltages. /// The voltage regulator can be configured for different output voltages.
/// Higher voltages allow for higher clock frequencies but increase power consumption and heat. /// Higher voltages allow for higher clock frequencies but increase power consumption and heat.
///
/// **Note**: For RP235x the maximum voltage is 1.30V, unless unlocked by setting unless the voltage limit
/// is disabled using the disable_voltage_limit field in the vreg_ctrl register. For lack of practical use at this
/// point in time, this is not implemented here. So the maximum voltage in this enum is 1.30V for now.
#[cfg(feature = "rp2040")]
#[repr(u8)] #[repr(u8)]
#[derive(Clone, Copy, Debug, PartialEq, Eq)] #[derive(Clone, Copy, Debug, PartialEq, Eq)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))] #[cfg_attr(feature = "defmt", derive(defmt::Format))]
@ -190,7 +185,7 @@ pub enum CoreVoltage {
/// The voltage regulator can be configured for different output voltages. /// The voltage regulator can be configured for different output voltages.
/// Higher voltages allow for higher clock frequencies but increase power consumption and heat. /// Higher voltages allow for higher clock frequencies but increase power consumption and heat.
/// ///
/// **Note**: For RP235x the maximum voltage is 1.30V, unless unlocked by setting unless the voltage limit /// **Note**: The maximum voltage is 1.30V, unless unlocked by setting unless the voltage limit
/// is disabled using the disable_voltage_limit field in the vreg_ctrl register. For lack of practical use at this /// is disabled using the disable_voltage_limit field in the vreg_ctrl register. For lack of practical use at this
/// point in time, this is not implemented here. So the maximum voltage in this enum is 1.30V for now. /// point in time, this is not implemented here. So the maximum voltage in this enum is 1.30V for now.
#[cfg(feature = "_rp235x")] #[cfg(feature = "_rp235x")]
@ -1092,20 +1087,14 @@ pub(crate) unsafe fn init(config: ClockConfig) {
let pll_sys_freq = match config.sys_pll { let pll_sys_freq = match config.sys_pll {
Some(sys_pll_config) => match configure_pll(pac::PLL_SYS, config.hz, sys_pll_config) { Some(sys_pll_config) => match configure_pll(pac::PLL_SYS, config.hz, sys_pll_config) {
Ok(freq) => freq, Ok(freq) => freq,
#[cfg(feature = "defmt")] Err(e) => panic!("Failed to configure PLL_SYS: {:?}", e),
Err(e) => panic!("Failed to configure PLL_SYS: {}", e),
#[cfg(not(feature = "defmt"))]
Err(_e) => panic!("Failed to configure PLL_SYS"),
}, },
None => 0, None => 0,
}; };
let pll_usb_freq = match config.usb_pll { let pll_usb_freq = match config.usb_pll {
Some(usb_pll_config) => match configure_pll(pac::PLL_USB, config.hz, usb_pll_config) { Some(usb_pll_config) => match configure_pll(pac::PLL_USB, config.hz, usb_pll_config) {
Ok(freq) => freq, Ok(freq) => freq,
#[cfg(feature = "defmt")] Err(e) => panic!("Failed to configure PLL_USB: {:?}", e),
Err(e) => panic!("Failed to configure PLL_USB: {}", e),
#[cfg(not(feature = "defmt"))]
Err(_e) => panic!("Failed to configure PLL_USB"),
}, },
None => 0, None => 0,
}; };