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WIP: add u5 adc

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This commit is contained in:
klownfish 2024-09-17 18:42:26 +02:00
parent f0a86d1a34
commit 0fe9fa631a
2 changed files with 26 additions and 39 deletions
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20
embassy-stm32/src/adc/mod.rs
View File

@ -4,7 +4,7 @@
#![allow(missing_docs)] // TODO #![allow(missing_docs)] // TODO
#![cfg_attr(adc_f3_v2, allow(unused))] #![cfg_attr(adc_f3_v2, allow(unused))]
#[cfg(not(any(adc_f3_v2, adc_u5)))] #[cfg(not(any(adc_f3_v2)))]
#[cfg_attr(adc_f1, path = "f1.rs")] #[cfg_attr(adc_f1, path = "f1.rs")]
#[cfg_attr(adc_f3, path = "f3.rs")] #[cfg_attr(adc_f3, path = "f3.rs")]
#[cfg_attr(adc_f3_v1_1, path = "f3_v1_1.rs")] #[cfg_attr(adc_f3_v1_1, path = "f3_v1_1.rs")]
@ -20,16 +20,14 @@ mod _version;
use core::marker::PhantomData; use core::marker::PhantomData;
#[allow(unused)] #[allow(unused)]
#[cfg(not(any(adc_f3_v2, adc_u5)))] #[cfg(not(any(adc_f3_v2)))]
pub use _version::*; pub use _version::*;
#[cfg(any(adc_f1, adc_f3, adc_v1, adc_l0, adc_f3_v1_1))] #[cfg(any(adc_f1, adc_f3, adc_v1, adc_l0, adc_f3_v1_1))]
use embassy_sync::waitqueue::AtomicWaker; use embassy_sync::waitqueue::AtomicWaker;
#[cfg(not(any(adc_u5)))]
pub use crate::pac::adc::vals; pub use crate::pac::adc::vals;
#[cfg(not(any(adc_f1, adc_f3_v2, adc_u5)))] #[cfg(not(any(adc_f1, adc_f3_v2)))]
pub use crate::pac::adc::vals::Res as Resolution; pub use crate::pac::adc::vals::Res as Resolution;
#[cfg(not(any(adc_u5)))]
pub use crate::pac::adc::vals::SampleTime; pub use crate::pac::adc::vals::SampleTime;
use crate::peripherals; use crate::peripherals;
@ -39,7 +37,7 @@ dma_trait!(RxDma, Instance);
pub struct Adc<'d, T: Instance> { pub struct Adc<'d, T: Instance> {
#[allow(unused)] #[allow(unused)]
adc: crate::PeripheralRef<'d, T>, adc: crate::PeripheralRef<'d, T>,
#[cfg(not(any(adc_f3_v2, adc_f3_v1_1, adc_u5)))] #[cfg(not(any(adc_f3_v2, adc_f3_v1_1)))]
sample_time: SampleTime, sample_time: SampleTime,
} }
@ -60,7 +58,7 @@ impl State {
trait SealedInstance { trait SealedInstance {
#[allow(unused)] #[allow(unused)]
fn regs() -> crate::pac::adc::Adc; fn regs() -> crate::pac::adc::Adc;
#[cfg(not(any(adc_f1, adc_v1, adc_l0, adc_f3_v2, adc_f3_v1_1, adc_g0, adc_u5)))] #[cfg(not(any(adc_f1, adc_v1, adc_l0, adc_f3_v2, adc_f3_v1_1, adc_g0)))]
#[allow(unused)] #[allow(unused)]
fn common_regs() -> crate::pac::adccommon::AdcCommon; fn common_regs() -> crate::pac::adccommon::AdcCommon;
#[cfg(any(adc_f1, adc_f3, adc_v1, adc_l0, adc_f3_v1_1))] #[cfg(any(adc_f1, adc_f3, adc_v1, adc_l0, adc_f3_v1_1))]
@ -168,7 +166,7 @@ foreach_adc!(
crate::pac::$inst crate::pac::$inst
} }
#[cfg(not(any(adc_f1, adc_v1, adc_l0, adc_f3_v2, adc_f3_v1_1, adc_g0, adc_u5)))] #[cfg(not(any(adc_f1, adc_v1, adc_l0, adc_f3_v2, adc_f3_v1_1, adc_g0)))]
fn common_regs() -> crate::pac::adccommon::AdcCommon { fn common_regs() -> crate::pac::adccommon::AdcCommon {
return crate::pac::$common_inst return crate::pac::$common_inst
} }
@ -205,12 +203,12 @@ macro_rules! impl_adc_pin {
/// Get the maximum reading value for this resolution. /// Get the maximum reading value for this resolution.
/// ///
/// This is `2**n - 1`. /// This is `2**n - 1`.
#[cfg(not(any(adc_f1, adc_f3_v2, adc_u5)))] #[cfg(not(any(adc_f1, adc_f3_v2)))]
pub const fn resolution_to_max_count(res: Resolution) -> u32 { pub const fn resolution_to_max_count(res: Resolution) -> u32 {
match res { match res {
#[cfg(adc_v4)] #[cfg(adc_v4)]
Resolution::BITS16 => (1 << 16) - 1, Resolution::BITS16 => (1 << 16) - 1,
#[cfg(adc_v4)] #[cfg(any(adc_v4, adc_u5))]
Resolution::BITS14 => (1 << 14) - 1, Resolution::BITS14 => (1 << 14) - 1,
#[cfg(adc_v4)] #[cfg(adc_v4)]
Resolution::BITS14V => (1 << 14) - 1, Resolution::BITS14V => (1 << 14) - 1,
@ -224,4 +222,4 @@ pub const fn resolution_to_max_count(res: Resolution) -> u32 {
#[allow(unreachable_patterns)] #[allow(unreachable_patterns)]
_ => core::unreachable!(), _ => core::unreachable!(),
} }
} }

45
embassy-stm32/src/adc/u5.rs
View File

@ -1,19 +1,19 @@
#[allow(unused)] #[allow(unused)]
use pac::adc::vals::{Difsel, Exten, Pcsel}; use pac::adc::vals::{Difsel, Exten, Pcsel};
use pac::adccommon::vals::Presc; use pac::adccommon::vals::Presc;
use crate::peripherals::ADC4; use pac::PWR;
use super::{ use super::{
blocking_delay_us, Adc, AdcChannel, AnyAdcChannel, Instance, Resolution, RxDma, SampleTime, SealedAdcChannel blocking_delay_us, Adc, AdcChannel, Instance, Resolution, SampleTime, SealedAdcChannel
}; };
use crate::time::Hertz; use crate::time::Hertz;
use crate::{pac, rcc, Peripheral}; use crate::{pac, rcc, Peripheral};
// TODO: not correct
const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(55); const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(55);
const VREF_CHANNEL: u8 = 19;
const TEMP_CHANNEL: u8 = 18; const VREF_CHANNEL: u8 = 1;
const VBAT_CHANNEL: u8 = 17; const VBAT_CHANNEL: u8 = 18;
const TEMP_CHANNEL: u8 = 19;
/// Default VREF voltage used for sample conversion to millivolts. /// Default VREF voltage used for sample conversion to millivolts.
pub const VREF_DEFAULT_MV: u32 = 3300; pub const VREF_DEFAULT_MV: u32 = 3300;
@ -140,9 +140,17 @@ pub enum Averaging {
impl<'d, T: Instance> Adc<'d, T> { impl<'d, T: Instance> Adc<'d, T> {
/// Create a new ADC driver. /// Create a new ADC driver.
pub fn new(adc: impl Peripheral<P = T> + 'd) -> Self { pub fn new(adc: impl Peripheral<P = T> + 'd) -> Self {
// move to u5 init (RCC)?
PWR.svmcr().modify(|w| {
w.set_avm1en(true);
});
while !PWR.svmsr().read().vdda1rdy() {}
PWR.svmcr().modify(|w| {
w.set_asv(true);
});
embassy_hal_internal::into_ref!(adc); embassy_hal_internal::into_ref!(adc);
rcc::enable_and_reset::<T>(); rcc::enable_and_reset::<T>();
let prescaler = Prescaler::from_ker_ck(T::frequency()); let prescaler = Prescaler::from_ker_ck(T::frequency());
T::common_regs().ccr().modify(|w| w.set_presc(prescaler.presc())); T::common_regs().ccr().modify(|w| w.set_presc(prescaler.presc()));
@ -158,26 +166,15 @@ impl<'d, T: Instance> Adc<'d, T> {
adc, adc,
sample_time: SampleTime::from_bits(0), sample_time: SampleTime::from_bits(0),
}; };
crate::pac::RCC.ahb2enr1().modify(|w| {
w.set_adc12en(true);
});
blocking_delay_us(100);
info!("chungus {}", line!());
s.power_up(); s.power_up();
info!("chungus {}", line!());
s.configure_differential_inputs(); s.configure_differential_inputs();
info!("chungus {}", line!());
s.calibrate(); s.calibrate();
info!("chungus {}", line!());
blocking_delay_us(1); blocking_delay_us(1);
info!("chungus {}", line!());
s.enable(); s.enable();
info!("chungus {}", line!());
s.configure(); s.configure();
info!("chungus {}", line!());
s s
} }
@ -186,19 +183,11 @@ impl<'d, T: Instance> Adc<'d, T> {
T::regs().isr().modify(|reg| { T::regs().isr().modify(|reg| {
reg.set_ldordy(true); reg.set_ldordy(true);
}); });
info!("yummmum {}", T::regs().cr().as_ptr() as u32);
T::regs().cr().modify(|reg| { T::regs().cr().modify(|reg| {
info!("bajssis {}", reg.0);
reg.set_deeppwd(false); reg.set_deeppwd(false);
info!("bajssis {}", reg.0);
reg.set_advregen(true); reg.set_advregen(true);
info!("bajssis {}", reg.0);
}); });
info!("kissis {}", T::regs().as_ptr() as u32); while !T::regs().isr().read().ldordy() { };
info!("basdsadasadjsisssss{}", T::regs().isr().as_ptr() as u32);
while !T::regs().isr().read().ldordy() {
// info!("bajsisssss{}", T::regs().isr().read().0);
};
T::regs().isr().modify(|reg| { T::regs().isr().modify(|reg| {
reg.set_ldordy(true); reg.set_ldordy(true);
@ -372,4 +361,4 @@ impl<'d, T: Instance> Adc<'d, T> {
while T::regs().cr().read().adstart() {} while T::regs().cr().read().adstart() {}
} }
} }
} }