>,
+ slice: usize,
}
-impl<'d, T: Slice> Pwm<'d, T> {
+impl<'d> Pwm<'d> {
fn new_inner(
- inner: impl Peripheral + 'd,
+ slice: usize,
a: Option>,
b: Option>,
b_pull: Pull,
config: Config,
divmode: Divmode,
) -> Self {
- into_ref!(inner);
-
- let p = inner.regs();
+ let p = pac::PWM.ch(slice);
p.csr().modify(|w| {
w.set_divmode(divmode);
w.set_en(false);
@@ -117,51 +115,67 @@ impl<'d, T: Slice> Pwm<'d, T> {
});
}
Self {
- inner,
+ // inner: p.into(),
pin_a: a,
pin_b: b,
+ slice,
}
}
/// Create PWM driver without any configured pins.
#[inline]
- pub fn new_free(inner: impl Peripheral + 'd, config: Config) -> Self {
- Self::new_inner(inner, None, None, Pull::None, config, Divmode::DIV)
+ pub fn new_free(slice: impl Peripheral + 'd, config: Config) -> Self {
+ into_ref!(slice);
+ Self::new_inner(slice.number(), None, None, Pull::None, config, Divmode::DIV)
}
/// Create PWM driver with a single 'a' as output.
#[inline]
- pub fn new_output_a(
- inner: impl Peripheral
+ 'd,
+ pub fn new_output_a(
+ slice: impl Peripheral + 'd,
a: impl Peripheral
> + 'd,
config: Config,
) -> Self {
- into_ref!(a);
- Self::new_inner(inner, Some(a.map_into()), None, Pull::None, config, Divmode::DIV)
+ into_ref!(slice, a);
+ Self::new_inner(
+ slice.number(),
+ Some(a.map_into()),
+ None,
+ Pull::None,
+ config,
+ Divmode::DIV,
+ )
}
/// Create PWM driver with a single 'b' pin as output.
#[inline]
- pub fn new_output_b(
- inner: impl Peripheral
+ 'd,
+ pub fn new_output_b(
+ slice: impl Peripheral + 'd,
b: impl Peripheral
> + 'd,
config: Config,
) -> Self {
- into_ref!(b);
- Self::new_inner(inner, None, Some(b.map_into()), Pull::None, config, Divmode::DIV)
+ into_ref!(slice, b);
+ Self::new_inner(
+ slice.number(),
+ None,
+ Some(b.map_into()),
+ Pull::None,
+ config,
+ Divmode::DIV,
+ )
}
/// Create PWM driver with a 'a' and 'b' pins as output.
#[inline]
- pub fn new_output_ab(
- inner: impl Peripheral
+ 'd,
+ pub fn new_output_ab(
+ slice: impl Peripheral + 'd,
a: impl Peripheral
> + 'd,
b: impl Peripheral
> + 'd,
config: Config,
) -> Self {
- into_ref!(a, b);
+ into_ref!(slice, a, b);
Self::new_inner(
- inner,
+ slice.number(),
Some(a.map_into()),
Some(b.map_into()),
Pull::None,
@@ -172,30 +186,30 @@ impl<'d, T: Slice> Pwm<'d, T> {
/// Create PWM driver with a single 'b' as input pin.
#[inline]
- pub fn new_input(
- inner: impl Peripheral
+ 'd,
+ pub fn new_input(
+ slice: impl Peripheral + 'd,
b: impl Peripheral
> + 'd,
b_pull: Pull,
mode: InputMode,
config: Config,
) -> Self {
- into_ref!(b);
- Self::new_inner(inner, None, Some(b.map_into()), b_pull, config, mode.into())
+ into_ref!(slice, b);
+ Self::new_inner(slice.number(), None, Some(b.map_into()), b_pull, config, mode.into())
}
/// Create PWM driver with a 'a' and 'b' pins in the desired input mode.
#[inline]
- pub fn new_output_input(
- inner: impl Peripheral
+ 'd,
+ pub fn new_output_input(
+ slice: impl Peripheral + 'd,
a: impl Peripheral
> + 'd,
b: impl Peripheral
> + 'd,
b_pull: Pull,
mode: InputMode,
config: Config,
) -> Self {
- into_ref!(a, b);
+ into_ref!(slice, a, b);
Self::new_inner(
- inner,
+ slice.number(),
Some(a.map_into()),
Some(b.map_into()),
b_pull,
@@ -206,7 +220,7 @@ impl<'d, T: Slice> Pwm<'d, T> {
/// Set the PWM config.
pub fn set_config(&mut self, config: &Config) {
- Self::configure(self.inner.regs(), config);
+ Self::configure(pac::PWM.ch(self.slice), config);
}
fn configure(p: pac::pwm::Channel, config: &Config) {
@@ -228,22 +242,22 @@ impl<'d, T: Slice> Pwm<'d, T> {
});
}
- /// Advances a slice’s output phase by one count while it is running
+ /// Advances a slice's output phase by one count while it is running
/// by inserting a pulse into the clock enable. The counter
/// will not count faster than once per cycle.
#[inline]
pub fn phase_advance(&mut self) {
- let p = self.inner.regs();
+ let p = pac::PWM.ch(self.slice);
p.csr().write_set(|w| w.set_ph_adv(true));
while p.csr().read().ph_adv() {}
}
- /// Retards a slice’s output phase by one count while it is running
+ /// Retards a slice's output phase by one count while it is running
/// by deleting a pulse from the clock enable. The counter will not
- /// count backward when clock enable is permenantly low.
+ /// count backward when clock enable is permanently low.
#[inline]
pub fn phase_retard(&mut self) {
- let p = self.inner.regs();
+ let p = pac::PWM.ch(self.slice);
p.csr().write_set(|w| w.set_ph_ret(true));
while p.csr().read().ph_ret() {}
}
@@ -251,13 +265,13 @@ impl<'d, T: Slice> Pwm<'d, T> {
/// Read PWM counter.
#[inline]
pub fn counter(&self) -> u16 {
- self.inner.regs().ctr().read().ctr()
+ pac::PWM.ch(self.slice).ctr().read().ctr()
}
/// Write PWM counter.
#[inline]
pub fn set_counter(&self, ctr: u16) {
- self.inner.regs().ctr().write(|w| w.set_ctr(ctr))
+ pac::PWM.ch(self.slice).ctr().write(|w| w.set_ctr(ctr))
}
/// Wait for channel interrupt.
@@ -281,7 +295,7 @@ impl<'d, T: Slice> Pwm<'d, T> {
#[inline]
fn bit(&self) -> u32 {
- 1 << self.inner.number() as usize
+ 1 << self.slice as usize
}
}
@@ -291,7 +305,7 @@ pub struct PwmBatch(u32);
impl PwmBatch {
#[inline]
/// Enable a PWM slice in this batch.
- pub fn enable(&mut self, pwm: &Pwm<'_, impl Slice>) {
+ pub fn enable(&mut self, pwm: &Pwm<'_>) {
self.0 |= pwm.bit();
}
@@ -308,9 +322,9 @@ impl PwmBatch {
}
}
-impl<'d, T: Slice> Drop for Pwm<'d, T> {
+impl<'d> Drop for Pwm<'d> {
fn drop(&mut self) {
- self.inner.regs().csr().write_clear(|w| w.set_en(false));
+ pac::PWM.ch(self.slice).csr().write_clear(|w| w.set_en(false));
if let Some(pin) = &self.pin_a {
pin.gpio().ctrl().write(|w| w.set_funcsel(31));
}
@@ -326,19 +340,14 @@ trait SealedSlice {}
#[allow(private_bounds)]
pub trait Slice: Peripheral
+ SealedSlice + Sized + 'static {
/// Slice number.
- fn number(&self) -> u8;
-
- /// Slice register block.
- fn regs(&self) -> pac::pwm::Channel {
- pac::PWM.ch(self.number() as _)
- }
+ fn number(&self) -> usize;
}
macro_rules! slice {
($name:ident, $num:expr) => {
impl SealedSlice for peripherals::$name {}
impl Slice for peripherals::$name {
- fn number(&self) -> u8 {
+ fn number(&self) -> usize {
$num
}
}
diff --git a/embassy-rp/src/uart/buffered.rs b/embassy-rp/src/uart/buffered.rs
index da1157984..c94164040 100644
--- a/embassy-rp/src/uart/buffered.rs
+++ b/embassy-rp/src/uart/buffered.rs
@@ -51,14 +51,20 @@ pub struct BufferedUartTx<'d, T: Instance> {
pub(crate) fn init_buffers<'d, T: Instance + 'd>(
_irq: impl Binding>,
- tx_buffer: &'d mut [u8],
- rx_buffer: &'d mut [u8],
+ tx_buffer: Option<&'d mut [u8]>,
+ rx_buffer: Option<&'d mut [u8]>,
) {
let state = T::buffered_state();
- let len = tx_buffer.len();
- unsafe { state.tx_buf.init(tx_buffer.as_mut_ptr(), len) };
- let len = rx_buffer.len();
- unsafe { state.rx_buf.init(rx_buffer.as_mut_ptr(), len) };
+
+ if let Some(tx_buffer) = tx_buffer {
+ let len = tx_buffer.len();
+ unsafe { state.tx_buf.init(tx_buffer.as_mut_ptr(), len) };
+ }
+
+ if let Some(rx_buffer) = rx_buffer {
+ let len = rx_buffer.len();
+ unsafe { state.rx_buf.init(rx_buffer.as_mut_ptr(), len) };
+ }
// From the datasheet:
// "The transmit interrupt is based on a transition through a level, rather
@@ -95,7 +101,7 @@ impl<'d, T: Instance> BufferedUart<'d, T> {
into_ref!(tx, rx);
super::Uart::<'d, T, Async>::init(Some(tx.map_into()), Some(rx.map_into()), None, None, config);
- init_buffers::(irq, tx_buffer, rx_buffer);
+ init_buffers::(irq, Some(tx_buffer), Some(rx_buffer));
Self {
rx: BufferedUartRx { phantom: PhantomData },
@@ -124,7 +130,7 @@ impl<'d, T: Instance> BufferedUart<'d, T> {
Some(cts.map_into()),
config,
);
- init_buffers::(irq, tx_buffer, rx_buffer);
+ init_buffers::(irq, Some(tx_buffer), Some(rx_buffer));
Self {
rx: BufferedUartRx { phantom: PhantomData },
@@ -175,7 +181,7 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> {
into_ref!(rx);
super::Uart::<'d, T, Async>::init(None, Some(rx.map_into()), None, None, config);
- init_buffers::(irq, &mut [], rx_buffer);
+ init_buffers::(irq, None, Some(rx_buffer));
Self { phantom: PhantomData }
}
@@ -192,7 +198,7 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> {
into_ref!(rx, rts);
super::Uart::<'d, T, Async>::init(None, Some(rx.map_into()), Some(rts.map_into()), None, config);
- init_buffers::(irq, &mut [], rx_buffer);
+ init_buffers::(irq, None, Some(rx_buffer));
Self { phantom: PhantomData }
}
@@ -323,7 +329,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
into_ref!(tx);
super::Uart::<'d, T, Async>::init(Some(tx.map_into()), None, None, None, config);
- init_buffers::(irq, tx_buffer, &mut []);
+ init_buffers::(irq, Some(tx_buffer), None);
Self { phantom: PhantomData }
}
@@ -340,12 +346,12 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
into_ref!(tx, cts);
super::Uart::<'d, T, Async>::init(Some(tx.map_into()), None, None, Some(cts.map_into()), config);
- init_buffers::(irq, tx_buffer, &mut []);
+ init_buffers::(irq, Some(tx_buffer), None);
Self { phantom: PhantomData }
}
- fn write<'a>(buf: &'a [u8]) -> impl Future