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Merge pull request #1671 from alepez/uart-swap

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stm32/uart: add swap_rx_tx
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Dario Nieuwenhuis 2023-07-19 10:12:49 +00:00 committed by GitHub
commit 07a9a4ffd8
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1 changed files with 25 additions and 2 deletions
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27
embassy-stm32/src/usart/mod.rs
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@ -116,6 +116,10 @@ pub struct Config {
/// but will effectively disable noise detection. /// but will effectively disable noise detection.
#[cfg(not(usart_v1))] #[cfg(not(usart_v1))]
pub assume_noise_free: bool, pub assume_noise_free: bool,
/// Set this to true to swap the RX and TX pins.
#[cfg(any(usart_v3, usart_v4))]
pub swap_rx_tx: bool,
} }
impl Default for Config { impl Default for Config {
@ -129,6 +133,8 @@ impl Default for Config {
detect_previous_overrun: false, detect_previous_overrun: false,
#[cfg(not(usart_v1))] #[cfg(not(usart_v1))]
assume_noise_free: false, assume_noise_free: false,
#[cfg(any(usart_v3, usart_v4))]
swap_rx_tx: false,
} }
} }
} }
@ -688,8 +694,22 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
let r = T::regs(); let r = T::regs();
rx.set_as_af(rx.af_num(), AFType::Input); // Some chips do not have swap_rx_tx bit
tx.set_as_af(tx.af_num(), AFType::OutputPushPull); cfg_if::cfg_if! {
if #[cfg(any(usart_v3, usart_v4))] {
if config.swap_rx_tx {
let (rx, tx) = (tx, rx);
rx.set_as_af(rx.af_num(), AFType::Input);
tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
} else {
rx.set_as_af(rx.af_num(), AFType::Input);
tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
}
} else {
rx.set_as_af(rx.af_num(), AFType::Input);
tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
}
}
configure(r, &config, T::frequency(), T::KIND, true, true); configure(r, &config, T::frequency(), T::KIND, true, true);
@ -847,6 +867,9 @@ fn configure(r: Regs, config: &Config, pclk_freq: Hertz, kind: Kind, enable_rx:
StopBits::STOP1P5 => vals::Stop::STOP1P5, StopBits::STOP1P5 => vals::Stop::STOP1P5,
StopBits::STOP2 => vals::Stop::STOP2, StopBits::STOP2 => vals::Stop::STOP2,
}); });
#[cfg(any(usart_v3, usart_v4))]
w.set_swap(config.swap_rx_tx);
}); });
r.cr1().write(|w| { r.cr1().write(|w| {
// enable uart // enable uart