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stm32: allow using LSI/LSE as SYSCLK on g0/c0

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This commit is contained in:
techmccat 2025-03-27 17:42:55 +01:00
parent 502c188cf4
commit 0621087f6f
2 changed files with 10 additions and 4 deletions
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7
embassy-stm32/src/rcc/c0.rs
View File

@ -3,6 +3,7 @@ pub use crate::pac::rcc::vals::{
Hpre as AHBPrescaler, Hsidiv as HsiSysDiv, Hsikerdiv as HsiKerDiv, Ppre as APBPrescaler, Sw as Sysclk,
};
use crate::pac::{FLASH, RCC};
use crate::rcc::LSI_FREQ;
use crate::time::Hertz;
/// HSI speed
@ -121,9 +122,13 @@ pub(crate) unsafe fn init(config: Config) {
}
};
let rtc = config.ls.init();
let sys = match config.sys {
Sysclk::HSISYS => unwrap!(hsisys),
Sysclk::HSE => unwrap!(hse),
Sysclk::LSI => { assert!(config.ls.lsi); LSI_FREQ }
Sysclk::LSE => unwrap!(config.ls.lse).frequency,
_ => unreachable!(),
};
@ -162,8 +167,6 @@ pub(crate) unsafe fn init(config: Config) {
RCC.cr().modify(|w| w.set_hsion(false));
}
let rtc = config.ls.init();
config.mux.init();
set_clocks!(

7
embassy-stm32/src/rcc/g0.rs
View File

@ -5,6 +5,7 @@ pub use crate::pac::rcc::vals::{
Pllr as PllRDiv, Pllsrc as PllSource, Ppre as APBPrescaler, Sw as Sysclk,
};
use crate::pac::{FLASH, PWR, RCC};
use crate::rcc::LSI_FREQ;
use crate::time::Hertz;
/// HSI speed
@ -234,10 +235,14 @@ pub(crate) unsafe fn init(config: Config) {
})
.unwrap_or_default();
let rtc = config.ls.init();
let sys = match config.sys {
Sysclk::HSI => unwrap!(hsisys),
Sysclk::HSE => unwrap!(hse),
Sysclk::PLL1_R => unwrap!(pll.pll_r),
Sysclk::LSI => { assert!(config.ls.lsi); LSI_FREQ }
Sysclk::LSE => unwrap!(config.ls.lse).frequency,
_ => unreachable!(),
};
@ -286,8 +291,6 @@ pub(crate) unsafe fn init(config: Config) {
PWR.cr1().modify(|w| w.set_lpr(true));
}
let rtc = config.ls.init();
config.mux.init();
set_clocks!(