add MDStatus() and some cleanup
This commit is contained in:
parent
7e38aa9a64
commit
fe237f8f09
@ -6,7 +6,6 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
#include <msp430.h>
|
#include <msp430.h>
|
||||||
#include "typedefExtention.h"
|
|
||||||
#include "SPI.h"
|
#include "SPI.h"
|
||||||
#include "motorDriver.h"
|
#include "motorDriver.h"
|
||||||
|
|
||||||
@ -14,22 +13,26 @@ const uchar MD_CS = BIT3;
|
|||||||
|
|
||||||
// register 0x00 GCINF
|
// register 0x00 GCINF
|
||||||
#define MD_GCONF 0X00
|
#define MD_GCONF 0X00
|
||||||
#define MD_GCONF_singgelMotor 0x00000001
|
#define MD_GCONF_singgelMotor BIT00
|
||||||
#define MD_GCONF_stepdir1Enable 0x00000002
|
#define MD_GCONF_stepdir1Enable BIT01
|
||||||
#define MD_GCONF_stepdir2Enable 0x00000004
|
#define MD_GCONF_stepdir2Enable BIT02
|
||||||
#define MD_GCONF_motor1Revers 0x00000010
|
#define MD_GCONF_motor1Revers BIT08
|
||||||
#define MD_GCONF_motor1Revers 0x00000010
|
#define MD_GCONF_motor1Revers BIT09
|
||||||
#define MD_GCONF_lockGCONF 0x00000020
|
#define MD_GCONF_lockGCONF BIT10
|
||||||
|
|
||||||
// register 0x01 GSTAT
|
// register 0x01 GSTAT
|
||||||
#define MD_GSTAT 0X01
|
#define MD_GSTAT 0X01
|
||||||
|
#define MD_GSTAT_recet BIT00
|
||||||
|
#define MD_GSTAT_drv_err1 BIT01
|
||||||
|
#define MD_GSTAT_drv_err2 BIT02
|
||||||
|
#define MD_GSTAT_un_cp BIT03
|
||||||
|
|
||||||
// register 0x30, 0x50 IHOLD_IRUN
|
// register 0x30, 0x50 IHOLD_IRUN
|
||||||
#define MD_IHIR1 0x30
|
#define MD_IHIR1 0x30
|
||||||
#define MD_IHIR2 0x50
|
#define MD_IHIR2 0x50
|
||||||
#define MD_IHIR_iHold 0
|
#define MD_IHIR_iHold 0 // 5 bitts ( (x+1)/32 A )
|
||||||
#define MD_IHIR_iRun 8
|
#define MD_IHIR_iRun 8 // 5 bits
|
||||||
#define md_IHIR_iHoldDelay 16ul
|
#define md_IHIR_iHoldDelay 16 // 4
|
||||||
|
|
||||||
// register 0x6C, 7C CHOPCONF
|
// register 0x6C, 7C CHOPCONF
|
||||||
#define MD_CC1 0X6C
|
#define MD_CC1 0X6C
|
||||||
@ -38,8 +41,17 @@ const uchar MD_CS = BIT3;
|
|||||||
#define MD_CC_doubbleEdge 0x20000000
|
#define MD_CC_doubbleEdge 0x20000000
|
||||||
#define MD_CC_16ustapI 0x10000000
|
#define MD_CC_16ustapI 0x10000000
|
||||||
#define MD_CC_mres 24 // 4 bits; 1/(2^x / 2^8) microstappen
|
#define MD_CC_mres 24 // 4 bits; 1/(2^x / 2^8) microstappen
|
||||||
#define MD_CC_vsens 0x00020000
|
#define MC_CC_FULLSTEP 8ul << MD_CC_mres
|
||||||
#define MD_CC_tbl 15 // 3 bits?
|
#define MC_CC_2US 7ul << MD_CC_mres
|
||||||
|
#define MC_CC_4US 6ul << MD_CC_mres
|
||||||
|
#define MC_CC_8US 5ul << MD_CC_mres
|
||||||
|
#define MC_CC_16US 4ul << MD_CC_mres
|
||||||
|
#define MC_CC_32US 3ul << MD_CC_mres
|
||||||
|
#define MC_CC_64US 2ul << MD_CC_mres
|
||||||
|
#define MC_CC_128US 1ul << MD_CC_mres
|
||||||
|
#define MC_CC_256US 0ul << MD_CC_mres
|
||||||
|
#define MD_CC_vsens BIT17
|
||||||
|
#define MD_CC_tbl 15 // 2 bits
|
||||||
#define MD_CC_cmh BIT14
|
#define MD_CC_cmh BIT14
|
||||||
#define MD_CC_rndtf 0x00002000
|
#define MD_CC_rndtf 0x00002000
|
||||||
#define MD_CC_disfdcc 0x00001000
|
#define MD_CC_disfdcc 0x00001000
|
||||||
@ -48,21 +60,21 @@ const uchar MD_CS = BIT3;
|
|||||||
#define MD_CC_hstrt 4 // 3 bits
|
#define MD_CC_hstrt 4 // 3 bits
|
||||||
#define MD_CC_toff 0 // 4 bits
|
#define MD_CC_toff 0 // 4 bits
|
||||||
|
|
||||||
// bool md_checkError(){
|
enum bool MDStatus(){
|
||||||
// unsigned long stat = md_read(MD_GSTAT);
|
unsigned long stat = md_read(MD_GSTAT);
|
||||||
// if(stat != 0){
|
if(stat != 0){
|
||||||
// if(stat == 0x1){ // only a recet has occert
|
if(stat == 0x1){ // only a recet has occert
|
||||||
// // restart the motor driver
|
// restart the motor driver
|
||||||
// md_setup();
|
md_setup();
|
||||||
// }else{ // one of the motorst stopt due to short or overheated or a undervoltage in chargepump
|
}else{ // one of the motors stopt due to short or overheated or a undervoltage in chargepump
|
||||||
// // wait a while for checking again
|
// wait a while for checking again
|
||||||
// delay(1000);
|
__delay_cycles(16000000);
|
||||||
// md_checkError();
|
MDStatus();
|
||||||
// }
|
}
|
||||||
// return true;
|
return true;
|
||||||
// }
|
}
|
||||||
// return false;
|
return false;
|
||||||
// }
|
}
|
||||||
|
|
||||||
void MD_write(uchar addr, ulong data) {
|
void MD_write(uchar addr, ulong data) {
|
||||||
char i;
|
char i;
|
||||||
@ -116,9 +128,13 @@ void MDInit(){
|
|||||||
P1DIR |= MD_CS; // set MD_CS (pin 3) as output
|
P1DIR |= MD_CS; // set MD_CS (pin 3) as output
|
||||||
P1OUT |= MD_CS; // set MD_CS high
|
P1OUT |= MD_CS; // set MD_CS high
|
||||||
|
|
||||||
|
MDStatus();
|
||||||
|
|
||||||
MD_write(MD_GCONF, MD_GCONF_stepdir2Enable | MD_GCONF_stepdir1Enable);
|
MD_write(MD_GCONF, MD_GCONF_stepdir2Enable | MD_GCONF_stepdir1Enable);
|
||||||
MD_write(MD_CC1, 3ul<<MD_CC_toff | (4ul<<MD_CC_hstrt) | (1ul<<MD_CC_hend) | (2ul<<MD_CC_tbl) | (4ul<<MD_CC_mres) | MD_CC_16ustapI);
|
MD_write(MD_CC1, 3ul<<MD_CC_toff | (4ul<<MD_CC_hstrt) | (1ul<<MD_CC_hend) | (2ul<<MD_CC_tbl) | MC_CC_FULLSTEP | MD_CC_16ustapI);
|
||||||
MD_write(MD_CC2, 3ul<<MD_CC_toff | (4ul<<MD_CC_hstrt) | (1ul<<MD_CC_hend) | (2ul<<MD_CC_tbl) | (4ul<<MD_CC_mres) | MD_CC_16ustapI);
|
MD_write(MD_CC2, 3ul<<MD_CC_toff | (4ul<<MD_CC_hstrt) | (1ul<<MD_CC_hend) | (2ul<<MD_CC_tbl) | MC_CC_FULLSTEP | MD_CC_16ustapI);
|
||||||
MD_write(MD_IHIR1, 10ul<<MD_IHIR_iHold | 31ul<<MD_IHIR_iRun | 6ul<<md_IHIR_iHoldDelay);
|
MD_write(MD_IHIR1, 10ul<<MD_IHIR_iHold | 31ul<<MD_IHIR_iRun | 6ul<<md_IHIR_iHoldDelay);
|
||||||
MD_write(MD_IHIR2, 10ul<<MD_IHIR_iHold | 31ul<<MD_IHIR_iRun | 6ul<<md_IHIR_iHoldDelay);
|
MD_write(MD_IHIR2, 10ul<<MD_IHIR_iHold | 31ul<<MD_IHIR_iRun | 6ul<<md_IHIR_iHoldDelay);
|
||||||
|
|
||||||
|
MDStatus();
|
||||||
}
|
}
|
||||||
|
|||||||
@ -8,6 +8,9 @@
|
|||||||
#ifndef MOTORDRIVER_H_
|
#ifndef MOTORDRIVER_H_
|
||||||
#define MOTORDRIVER_H_
|
#define MOTORDRIVER_H_
|
||||||
|
|
||||||
|
#include "typedefExtention.h"
|
||||||
|
|
||||||
void MDInit();
|
void MDInit();
|
||||||
|
enum bool MDStatus();
|
||||||
|
|
||||||
#endif /* MOTORDRIVER_H_ */
|
#endif /* MOTORDRIVER_H_ */
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user